The TI SN74AUP1G80DPWR is a single D-type flip-flop from the 74AUP low-power series, clocked at 260 MHz on a positive edge and delivering an inverted output. It runs on a 0.8 V to 3.6 V supply, drawing 500 nA quiescent current.
260 MHz clock and 6.4 ns propagation delay — timing budget for the bus
The 260 MHz clock frequency and 6.4 ns max propagation delay at 3.3 V, 30 pF set the timing closure window for the receiving latch. The 6.4 ns delay means this flip-flop is sized for lower-speed clock domains, level translation, or de-glitch stages where the 500 nA standby is the real win.
Supply range and drive current — BOM-fit for multi-voltage rails
With a supply range from 0.8 V to 3.6 V, this part bridges core logic and peripheral buses without a separate level shifter. The 4 mA output drive at both high and low is enough for a single CMOS load or a short trace.
The 74AUP series is TI's ultra-low-power logic family, so the SN74AUP1G80DPWR is a safe selection for new designs that need a single-bit flip-flop with inverted output at sub-1 V operation.