Triple 3-input NAND — 3 ns at 3.3 V
The SN74ALVC10PWR is a triple 3-input NAND gate from TI's 74ALVC low-voltage CMOS logic family. It operates from 1.65 V to 3.6 V. The 3 ns propagation delay at 3.3 V, 50 pF load gives it the timing margin needed in clock distribution, address decoding, or control signal gating on high-speed boards. Outputs sink and source 24 mA each, enough to drive multiple CMOS loads or short PCB traces without a buffer.
Industrial temperature, surface-mount footprint
Rated -40°C to 85°C, this gate handles factory-floor ambient and outdoor telecom enclosures without derating. The 14-TSSOP package (4.40 mm body width) fits tight PCB layouts and is compatible with standard reflow profiles. Supply current sits at 10 µA quiescent — negligible in battery-powered or always-on subsystems.
Active production, no LTB concern
TI lists the SN74ALVC10PWR as Active with ROHS3 compliance. No end-of-life notice or last-time-buy window to track. For a BOM line that needs a reliable 3-input NAND in a 14-TSSOP footprint, this part is a straight-in selection without supply-risk overhead.
