Triple 3-input NAND — 3 ns at 3.3 V
The SN74ALVC10PWR is a triple 3-input NAND gate from TI's 74ALVC low-voltage CMOS logic family. The 3 ns propagation delay at 3.3 V, 50 pF load gives it the timing margin needed in clock distribution, address decoding, or control signal gating on high-speed boards. Outputs sink and source 24 mA each, enough to drive multiple CMOS loads or short PCB traces without a buffer.
Industrial temperature, surface-mount footprint
Supply current sits at 10 µA quiescent — negligible in battery-powered or always-on subsystems.