Single inverter in a tiny SC-70-5 package
The Texas Instruments SN74AHC1GU04DCKT is a single unbuffered inverter from the 74AHC family, packed into a 5-lead SC-70-5 (SOT-353) package. It operates from 2V to 5.5V, making it a natural fit for mixed 3.3V and 5V logic rails. With 8mA source and sink capability and a propagation delay of 7ns at 5V with a 50pF load, it handles typical board-level signal inversion without adding latency. The unbuffered output gives a cleaner edge in oscillator or crystal-driver circuits where the standard buffered inverter might introduce too much phase shift.
Supply voltage and logic-level compatibility
The 2V to 5.5V supply range directly answers the question of 3.3V and 5V compatibility. At 3.3V VCC the input high threshold is 1.7V minimum, so a 3.3V CMOS output drives it cleanly. At 5V the low threshold is 1.1V maximum, which also works with 3.3V outputs as long as the driver's VOH exceeds 1.7V. For 1.8V logic this part is not a good fit — the low threshold at 2V supply is 0.3V, which is too tight for reliable noise margin.
Propagation delay and timing margin
The 7ns max propagation delay at 5V, 50pF is the number to check against your timing budget. In a 20 MHz clock path that's roughly 14% of the period — fine for most glue logic, but if you are cascading several gates in a high-speed counter or PLL feedback, the accumulated delay can eat into setup margin. The unbuffered topology means the delay is more load-sensitive than a buffered gate; keep the capacitive load under 50pF to stay within the spec.
Package and board-level handling
The SC-70-5 (SOT-353) footprint is 2.0 mm × 2.1 mm with a 0.65 mm pitch. That is a hand-solderable size with a fine-tipped iron, but reflow is preferred. MSL 1 out of the bag — no bake required before reflow as long as the seal is intact. The 1 µA max quiescent current means it adds negligible power draw in battery-operated designs.
Lifecycle and sourcing posture
TI lists the SN74AHC1GU04DCKT as Active with ROHS3 compliance. The laser etch and date-code consistency are verifiable against TI's marking specification — any mismatch in font or orientation flags a suspect part.