Dual D-Type flip-flop with set/reset – 160 MHz in a 14-SOIC footprint
The SN74AC74D is a dual D-type flip-flop from TI's 74AC family, each element with independent set and reset inputs and complementary outputs. Clocked on the positive edge, it toggles at up to 160 MHz — fast enough for moderate-speed data pipelines, state machines, and frequency dividers without resorting to a faster logic family.
Supply flexibility and output drive for mixed-voltage boards
Runs from 2V to 6V, so it can sit on a 3.3V or 5V rail without a level translator. The 24 mA source/sink per output drives the input capacitance of several downstream CMOS loads directly — useful when the next stage is a microcontroller GPIO or another 74AC gate. Propagation delay is 6 ns typ at 5V, 50 pF load. That 6 ns window includes the clock-to-Q path; budget it in your timing closure for the worst-case temperature and supply corner.
The 14-SOIC package is a standard JEDEC outline — pick-and-place friendly, MSL level 1 (typical for this package), no special bake required before reflow.
The 14-SOIC body (3.90 mm width) fits a standard 1.27 mm pitch footprint; no fine-pitch alignment issues on a two-layer board. Quiescent current is only 2 µA, so the flip-flop adds negligible standby draw in battery-backed or always-on subsystems.