What this LVDS receiver does on the board
The SN65LVDT390PW is a quad LVDS receiver from Texas Instruments' 65LVDT family — it takes four differential LVDS signal pairs and converts them to single-ended CMOS levels. With a 200 Mbps per-channel data rate, it handles high-speed serial links like clock distribution, backplane data, or camera-sensor interfaces without needing a transceiver on the receive side. Supply range is 3V to 3.6V, so a nominal 3.3V rail with ±5% tolerance keeps the receiver in spec.
Package and rework considerations
Housed in a 16-TSSOP (0.173-inch body width, 4.40 mm), the SN65LVDT390PW is a fine-pitch surface-mount part. The 0.65 mm pin pitch is hand-reworkable with a hot-air station if you preheat the board — the narrow body means the plastic sees less thermal mass than a wider SOIC, so keep the air nozzle at 300°C and watch for the solder to flow before lifting. The 16-TSSOP footprint is common across TI's LVDS receiver line, so swapping in a sibling part for prototyping doesn't require a board respin.
Lifecycle and supply posture
Normal production lead times apply; the part is not allocation-flagged. ROHS3 compliant, so it passes the current EU material restriction requirements without an exemption. The 65LVDT series includes both receivers and drivers; the SN65LVDT390PW is the quad receiver variant. No official second-source cross-reference is published, but the pinout and electrical spec align with industry-standard LVDS quad receivers in the same 16-TSSOP footprint.