FRAM memory — no erase penalty, unified code and data space
Its 128 KB program memory uses FRAM instead of Flash — meaning writes happen at bus speed without an erase cycle, and the same memory can hold both code and data. This simplifies firmware updates and reduces peak write power, a real advantage in battery-powered or energy-harvesting designs.
Integrated LCD driver and 12-bit ADC reduce BOM count
The on-chip LCD controller drives segment displays directly, saving an external display driver IC and its associated board area. Combined with the 18-channel 12-bit ADC and 76 GPIO, this part can handle a sensor front-end, user interface, and communication in a single chip.
