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Texas Instruments MSP430FR5987IPMR — Microcontrollers & Processors (MCU / MPU / DSP)

MSP430FR5987IPMR — MSP430 FRAM MCU, 64KB / 16MHz, 64-LQFP, EOL

MPNMSP430FR5987IPMR
End of Life

Texas Instruments MSP430 FRAM series, 16-bit MSP430 CPUXV2 core at 16MHz, 64KB FRAM / 2KB RAM, 48 I/O, 12-ch 12-bit ADC, I²C/SPI/UART, 1.8–3.6V supply, 64-LQFP, −40°C to 85°C, Tape & Reel.

$5.1905Ref. price · indicative, final on quote
StockContact for availability
MOQ1 pcs
  • 100% new & originalTraceable channels only — no refurbs, no pulls, no remarked parts.
  • Date & lot codes on quoteStated per line before you commit; label photos on request.
  • MSL-compliant ESD packingMoisture-sealed bags with indicator cards; reels photo-verified.
  • PayPal buyer protectionPay by T/T, PayPal or Payoneer — card payments covered end to end.

Specifications

MSP430FR5987IPMR Technical Specifications
ParameterValue
SeriesMSP430™ FRAM
Mounting typeSurface Mount
Oscillator typeInternal
Program memory typeFRAM
Voltage - supply (Vcc (Vdd))1.8V ~ 3.6V
Operating temperature-40°C~85°C(TA)
Speed16MHz
PackageTape & Reel (TR)
RAM size2K x 8
Core size16-Bit
PeripheralsBrown-out Detect/Reset, DMA, POR, PWM, WDT
ConnectivityI²C, IrDA, SPI, UART/USART
Number of i (O)48
Core processorMSP430 CPUXV2
Case64-LQFP
Data convertersA/D 12x12b
Program memory size64KB (64K x 8)

Frequently asked questions

Is the MSP430FR5987IPMR obsolete and what replaces it?

The lifecycle entry shows eol_hot. No successor order code is listed in the available cross-reference. Sourcing requires an RFQ against remaining stock or broker channels — this is not a standard active-part replenishment situation.

Does the 64KB FRAM need linker or memory-map changes when porting code from a Flash-based MSP430?

The MSP430 CPUXV2 core is common across both Flash and FRAM MSP430 families, and TI's driverlib abstracts the memory type. FRAM regions map into the standard linker command-file layout the same way Flash does — the port typically requires adjusting the memory origin and length definitions for the FRAM region size, not a rewrite of peripheral initialization. Verify the specific driverlib version for FRAM-aware API calls if using the FRAM controller (FRCTL) for write-cycle optimization.