Seven 24-bit ΣΔ ADCs on a 16-bit core – the metering SoC play
Its standout feature is the seven 24-bit sigma-delta analog-to-digital converters that simultaneously sample voltage and current channels — three phases plus neutral — with the DMA engine moving results without CPU intervention. An integrated LCD driver, brown-out reset, POR, and PWM peripherals complete the bill of materials for a single-chip meter design.
25 MHz CPUXV2 – timing margin for real-time compute
The 25 MHz clock rate on the MSP430 CPUXV2 core gives enough headroom to run the seven ΣΔ ADC result handlers, the energy calculation filters, and the communication stack (I²C, SPI, UART, LIN –) within a single 50 Hz or 60 Hz line cycle.