25 MHz core — what it buys you
The 25 MHz clock on the MSP430 CPUXV2 handles metrology interrupts and UART or SPI transactions within one line cycle. The six ADCs stream data for real-time response.
Lifecycle reality: obsolete, not active
TI has marked the MSP430F67671IPZR as obsolete. No last-time-buy window remains open through the factory channel. Any procurement for a BOM line that carries this code will go through the surplus and independent distributor market. The part is sourced and quoted to order against an RFQ — availability and current pricing are confirmed at quote time. There is no official TI-recommended replacement listed in the lifecycle record; a cross-reference search against the MSP430F6xx family may yield a pin-compatible variant with similar ADC count, but that needs to be validated against the specific firmware and PCB layout.
Six 24-bit sigma-delta ADCs — the design anchor
The six 24-bit sigma-delta converters are the reason this part exists. They are intended for simultaneous sampling of three voltage and three current channels in a three-phase meter. The digital filter inside the modulator decimates the bitstream to a word rate that the CPU can read without a separate DSP. On the board, keep the analog supply clean — the 1.8 V to 3.6 V range on Vcc/Vdd means the ADC reference can share the same rail if a low-noise LDO feeds it. The 62 I/O lines give room for a segment LCD driver, tamper detection switches, and a communication module without an external port expander.
