GaN power stage with integrated driver — what the 70 mOhm Rds(on) means for the BOM
The Texas Instruments LMG3411R070RWHT is a 600 V GaN FET with an integrated gate driver, bootstrap circuit, and 5 V regulated output, all in a 32-VQFN Exposed Pad package. That Rds(on) figure is the number to size the heatsinking against: at 12 A the I²R loss hits about 10 W, so the exposed pad on the 32-VQFN (8x8 mm) needs a solid via-stitched thermal land on the PCB to keep junction temperature inside the -40 to 125 °C operating range. The integrated bootstrap and 5 V regulator eliminate the external bootstrap diode and a separate LDO for the high-side gate drive supply, pulling two to three passives off the BOM.
Protection set and supply rail requirements
The part integrates over-current, over-temperature, and UVLO fault protection, so a separate comparator-based protection circuit is not needed. The Vcc/Vdd supply range is 9.5 V to 18 V — design the bias rail for at least 10 V to hold margin through UVLO threshold. The PWM logic interface accepts a non-inverting input and drives a P-channel output configuration in a 1:1 input-to-output ratio. That means a single PWM signal from a controller or MCU directly controls the high-side switch; no level-shifter or dead-time generator is required because the integrated driver handles the bootstrap refresh.