J-FET input stage — what the 50 pA bias buys you
The J-FET front end delivers a typical input bias current of 50 pA, which keeps the voltage error from source impedance low — important when the signal comes from a high-impedance sensor or a photodiode without a transimpedance buffer. Supply range runs from 7 V to 36 V, so it fits both ±5 V and ±15 V split-rail designs as well as single-supply systems with enough headroom.
If the board goes into a motor drive, outdoor telecom cabinet, or engine bay, the LF411CD is not the right choice — look at a J-FET op-amp with an extended temperature grade instead.
The 800 µV input offset voltage and 50 pA bias current are the specs that matter for precision — the 13 V/µs slew rate tells you it can drive a 10 V step in under a microsecond.