The 25kV/µs common-mode transient immunity (CMTI) means it holds the data path clean even when a motor drive or inverter switches a high-voltage rail under the isolation barrier.
25Mbps and 58ns propagation delay — timing budget for the bus
At 25Mbps the part supports a 40ns bit period, so the 58ns max propagation delay takes up about 1.5 bit periods round-trip. That matters when you're closing a control loop over an isolated SPI or UART link: the loop adds roughly 116ns of latency before the remote side sees the data. The 2.5ns rise and 2ns fall times (typical) keep edge rates fast enough that signal-integrity work on the PCB — trace length matching, termination — becomes the bottleneck, not the isolator.
The ISO7310FCDR runs from 3V to 5.5V on both sides, so it works with 3.3V and 5V logic without a separate level shifter.
Package and footprint — 8-SOIC reality
The part comes in an 8-SOIC package (3.90mm body width), surface-mount only. The standard SOIC-8 footprint applies; no special land pattern needed. No isolated power on chip — the ISO7310FCDR is a signal-only isolator; the secondary side needs its own supply rail.