16-bit precision DAC in a small 8-VSSOP package
It uses a String DAC architecture with an external reference and delivers a buffered voltage output. The device settles to within 1 LSB in 10 µs, making it suitable for precision control loops, waveform generation, and sensor calibration where update rates up to 100 kHz are needed.
The integral nonlinearity (INL) is ±3 LSB maximum, which at 16 bits corresponds to roughly ±46 ppm of full-scale. That is the absolute-accuracy spec: if you command mid-scale, the output lands within that window of the ideal transfer function. The differential nonlinearity (DNL) is ±0.25 LSB — well inside the ±0.5 LSB boundary that guarantees monotonicity. No missing codes, so a closed-loop PID controller or a precision setpoint generator will not see the output step backward when the digital code increments. For a 16-bit DAC, this DNL spec is tight enough that you can run open-loop trimming without worrying about non-monotonic jumps.
Supply and interface — single-rail simplicity
No separate AVDD/DVDD sequencing or split-plane headache. The SPI/DSP interface accepts standard 3.3 V logic levels directly — no level shifter needed when the host MCU runs at 3.3 V. The 8-VSSOP package (3.00 mm width) fits tight mixed-signal layouts, and the buffered output can drive a few milliamps into a sample-and-hold or ADC driver input without an external op-amp.