Skip to main content
Texas Instruments CDCLVD110AVFR — Clock & Timing ICs

CDCLVD110AVFR Clock Buffer 2:10 LVDS 1.1GHz 32-LQFP

MPNCDCLVD110AVFR
End of Life

Texas Instruments CDCLVD110AVFR, Fanout Buffer (Distribution), Multiplexer, 2:10 LVDS, 1.1 GHz max frequency, 2.375V to 2.625V supply, -40°C to 85°C, 32-LQFP (7x7) package.

$12.14Ref. price · indicative, final on quote
Packaging32-LQFP
StockContact for availability
MOQ1 pcs
  • 100% new & originalTraceable channels only — no refurbs, no pulls, no remarked parts.
  • Date & lot codes on quoteStated per line before you commit; label photos on request.
  • MSL-compliant ESD packingMoisture-sealed bags with indicator cards; reels photo-verified.
  • PayPal buyer protectionPay by T/T, PayPal or Payoneer — card payments covered end to end.

Specifications

CDCLVD110AVFR Technical Specifications
ParameterValue
TypeFanout Buffer (Distribution), Multiplexer
Mounting typeSurface Mount
Voltage2.375V ~ 2.625V
Frequency1.1 GHz
Operating temperature-40°C ~ 85°C
InputLVDS
OutputLVDS
PackageTape & Reel (TR); Cut Tape (CT)
Case32-LQFP
Number of circuits1
Ratio - Input:Output2:10
Differential - Input:OutputYes/Yes

Product details

What this LVDS fanout buffer does

The CDCLVD110AVFR is a 2:10 LVDS fanout buffer and multiplexer from Texas Instruments. It takes up to two LVDS clock inputs and distributes a selected input to ten LVDS outputs, all differential, with a maximum frequency of 1.1 GHz. The 2:10 ratio means one device can feed ten clock destinations from two selectable sources, reducing component count on high-speed serial backplanes or FPGA clock trees.

Supply and temperature range

Supply voltage is tight at 2.375V to 2.625V — this is a 2.5V nominal rail part. The regulator feeding it should be clean and low-noise; a 100 nF plus 10 µF decoupling pair per supply pin is the standard starting point.

Package and footprint

Housed in a 32-LQFP (7x7 mm) with 0.8 mm pitch — a standard quad flat pack that routes easily on a four-layer board. The exposed pad on the bottom side should be soldered to a ground-plane thermal land for heat sinking. Available in Tape & Reel (TR) or Cut Tape (CT) — the 'VFR' suffix denotes the reeled variant, which is the production-friendly ordering code for automated assembly.

Active production status

The part is ROHS3 compliant.

Frequently asked questions

What is the maximum frequency of the CDCLVD110AVFR?

The CDCLVD110AVFR supports a maximum frequency of 1.1 GHz on the LVDS clock path. This is the upper limit for the differential signal; the actual system clock rate should stay below this to maintain output skew and jitter margins.

Does the CDCLVD110AVFR replace the CDCLVP110?

The CDCLVP1204RGTR is a different output type (LVPECL vs LVDS) and a different fanout ratio (2:4 vs 2:10). They are not drop-in replacements. The CDCLVD110AVFR is the LVDS-output 2:10 variant; the CDCLVP1204RGTR serves LVPECL-based clock trees with fewer outputs.