The CDCLVC1310RHBR is a fanout buffer with a built-in multiplexer, taking up to three clock inputs and distributing them to ten LVCMOS outputs. It accepts a wide range of input standards — HCSL, LVCMOS, LVDS, LVPECL, SSTL, or a crystal — making it a universal clock distribution point on a mixed-signal board. The 3:10 input-to-output ratio means you can select one of three clock sources and fan it out to ten loads. The maximum output frequency of 200 MHz covers most microcontroller, FPGA, and Ethernet PHY reference clocks.
Supply voltage and temperature grade
The supply range of 2.375V to 3.465V covers 2.5V and 3.3V rails, so you can run it from a common LDO without a separate regulator.
Lifecycle and sourcing posture
It is ROHS3 compliant.
