250 MHz 1:8 HCSL fanout buffer
The CDCDB803RSLR is a 1:8 clock buffer from Texas Instruments that accepts one HCSL input and delivers eight HCSL outputs, each running up to 250 MHz. The differential HCSL signalling keeps edge rates clean for PCIe reference clocks, Ethernet PHY masters, and FPGA reference distribution.
Industrial temperature and supply range
The supply rail accepts 3V to 3.6V, so a nominal 3.3V rail with ±5% tolerance stays inside the window without an extra regulator.
48-VQFN package and reflow considerations
Housed in a 48-VFQFN with an exposed pad (6x6 mm body), the part requires a thermal land on the PCB to pull heat out of the die. Standard lead-free reflow profile applies; no exotic process steps needed.
Active production — sourcing posture
We source against your BOM quantity and confirm current pricing and lead time at quote — no stock-holding claim, no shelf-life risk.