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Texas Instruments ADS1256IDBRG4 — Analog & Data Acquisition

TI ADS1256IDBRG4 24-Bit Sigma-Delta ADC, 30 kSPS, SSOP-28

MPNADS1256IDBRG4
End of Life

Texas Instruments ADS1256IDBRG4, 24-bit Sigma-Delta ADC, 30 kSPS, SPI, PGA, 8-channel differential/single-ended, 5V analog / 1.8V-3.6V digital, -40°C~85°C, 28-SSOP, Tape & Reel.

$1.3400Ref. price · indicative, final on quote
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Specifications

ADS1256IDBRG4 Technical Specifications
ParameterValue
Input typeDifferential, Single Ended
Mounting typeSurface Mount
Reference typeExternal
Voltage - supply, analog5V
Voltage - supply, digital1.8V ~ 3.6V
Number of inputs4, 8
InterfaceSPI
Operating temperature-40°C~85°C
PackageTape & Reel (TR)
FeaturesPGA
ArchitectureSigma-Delta
ConfigurationMUX-PGA-ADC
Number of bits24
Case28-SSOP (0.209\", 5.30mm Width)
Number of a (D converters)1
Sampling rate (Per second)30k

Product details

Precision measurement ADC with on-chip PGA

The Texas Instruments ADS1256IDBRG4 is a 24-bit sigma-delta ADC designed for precision measurement applications that demand low noise and high resolution. Its architecture combines a multiplexer, a programmable gain amplifier (PGA), and the ADC core in a single 28-SSOP package, making it a fit for weigh scales, strain-gauge transducers, pressure sensors, and industrial process control loops where the signal amplitude varies across channels.

30 kSPS data rate — what it buys you

The 30 kSPS maximum sampling rate sets the upper bound for per-channel throughput. In a multiplexed system scanning all 8 single-ended inputs, each channel sees roughly 3.75 kSPS — fast enough for DC or slowly varying signals like temperature, pressure, or load cells, but not for audio or vibration monitoring. The sigma-delta modulator oversamples the input, so the digital filter settles in a few conversion cycles; expect a 50 Hz or 60 Hz notch filter to be implemented in the host microcontroller's firmware for line-frequency rejection.

Supply rails and reference planning

The external reference (REF+ / REF-) must be a low-drift precision source — the ADC's noise floor is set by the reference, not the converter. A 2.5 V or 5 V reference with under 3 ppm/°C drift is typical for 24-bit systems. The split supply means the board needs two voltage domains; a single LDO feeding both rails will couple digital switching noise into the analog section, so plan for separate regulators or a post-filter on the analog rail.

Input configuration and PGA gain staging

The MUX-PGA-ADC configuration supports 4 differential or 8 single-ended inputs. The PGA provides gain from 1 to 64 in binary steps, letting the user amplify millivolt-level sensor outputs before conversion. At gain 64, the full-scale input range is roughly ±39 mV with a 5 V reference — useful for bridge-type sensors. The differential input mode rejects common-mode noise from long cable runs, which is the typical hookup in industrial panel wiring. The input multiplexer is break-before-make, so channel-to-channel crosstalk is limited to the charge injection from the switch capacitance.

Frequently asked questions

What is the maximum data rate of the ADS1256IDBRG4?

The ADS1256IDBRG4 samples at a maximum rate of 30 kSPS. This is the throughput for a single channel; when scanning multiple inputs through the multiplexer, the per-channel rate divides by the number of active channels.

Does the ADS1256IDBRG4 require an external reference?

Yes, the reference type is external. A precision voltage reference must be connected to the REF+ and REF- pins — the ADC does not include an internal bandgap reference. The reference voltage sets the full-scale input range.