Zero-recovery switching — the SiC advantage in hard-switched rails
The STPSC10H065DLF is a 650 V, 10 A silicon carbide Schottky diode from STMicroelectronics. In a hard-switched PFC or LLC converter, that zero-Qrr eliminates the reverse-recovery current spike that costs you efficiency and heats up the FET. The trr is literally zero; the datasheet calls it "No Recovery Time > 500mA (Io)" because there is no recovery event to measure. The 10 A average rectified current at a 650 V blocking voltage gives you headroom on a 400 V DC bus — the 250 V margin absorbs flyback transients and mains surges without avalanche stress. Junction temperature range is -40°C to 175°C; the SiC die runs cooler than a silicon ultrafast at the same load because conduction loss is the only loss mechanism.
Package and thermal path — the PowerFlat exposed-pad layout
The thermal pad is the cathode — it carries the full 10 A and dumps heat into the PCB copper. A 2 oz copper pour under the pad with thermal vias to an inner-plane ground layer keeps the junction below 125°C at 10 A continuous in still air. The package footprint is non-standard for a TO-220 replacement; the layout engineer needs the ST recommended land pattern from the datasheet, not a generic DFN footprint. The diode is rated for 1.55 V forward drop at 10 A and 25°C junction. That Vf is higher than a silicon Schottky of the same voltage class, but the absence of reverse-recovery loss more than compensates above 50 kHz switching. Capacitance is 595 pF at 0 V bias — low enough for soft-switching topologies where the output capacitance resonates with the tank inductor.
For a BOM that already uses the through-hole sibling STPSC10H065DY, this surface-mount version is the same SiC die in a different package — same 650 V, same 10 A, same 175°C junction rating. The PowerFlat package drops the lead inductance compared to the TO-220, which improves switching performance at the cost of a board-spin for the footprint. No rewire needed; the PCB layout is the only delta.