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STMicroelectronics STM32L431CBU6TR — Microcontrollers & Processors (MCU / MPU / DSP)
STMicroelectronics

STM32L431CBU6TR ARM Cortex-M4 MCU, 80 MHz, 128 KB Flash

MPNSTM32L431CBU6TR
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STMicroelectronics STM32L4 series, ARM® Cortex®-M4 32-Bit MCU, 80MHz, 128KB Flash, 64K x 8 RAM, 1.71V~3.6V, -40°C~85°C, 48-UFQFN Exposed Pad, Tape & Reel.

$2.5609Ref. price · indicative, final on quote
STM32L431CBU6TR datasheet
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Specifications

STM32L431CBU6TR Technical Specifications
ParameterValue
SeriesSTM32L4
Mounting typeSurface Mount
Oscillator typeInternal
Program memory typeFLASH
Voltage - supply (Vcc (Vdd))1.71V ~ 3.6V
Operating temperature-40°C ~ 85°C (TA)
Speed80MHz
PackageTape & Reel (TR)
RAM size64K x 8
Core size32-Bit Single-Core
PeripheralsBrown-out Detect/Reset, DMA, PWM, WDT
ConnectivityCANbus, I²C, IrDA, LINbus, QSPI, SAI, SPI, SWPMI, UART/USART
Number of i (O)38
Core processorARM® Cortex®-M4
Case48-UFQFN Exposed Pad
Data convertersA/D 10x12b; D/A 2x12b
Program memory size128KB (128K x 8)

Product details

The STM32L431CBU6TR: The core runs at 80 MHz with a single-precision floating-point unit.

48-UFQFN with exposed pad — layout and thermal notes

The 38 available I/Os give enough headroom for a CAN transceiver, a few analog inputs, and a parallel LCD or QSPI flash interface without multiplexing.

Peripherals and connectivity — what is on the bus

The peripheral set includes CANbus, I²C, SPI, UART/USART, QSPI, SAI, and SWPMI — enough to talk to most industrial sensors, displays, and wireless modules without external bridge chips.

Frequently asked questions

What is the closest pin-compatible alternative to STM32L431CBU6TR in this family?

Within the STM32L431 series, the base product number STM32L431 covers multiple Flash and RAM density options in the same 48-UFQFPN footprint. The STM32L431CBU6 (non-tape-and-reel suffix) is the same die in the same package, differing only in the shipping medium. For a higher-density sibling, the STM32L431RC series offers up to 256 KB Flash while maintaining pin compatibility, though the exact memory map and available I/Os should be verified against the target firmware.