Skip to main content
STMicroelectronics STM32L073RZT6U — Microcontrollers & Processors (MCU / MPU / DSP)

STM32L073RZT6U STM32L0 ARM Cortex-M0+ MCU, 32 MHz

MPNSTM32L073RZT6U
Active

STMicroelectronics STM32L073RZT6U, STM32L0 series, 32-bit ARM Cortex-M0+ MCU, 32 MHz, 192 KB Flash, 20 KB RAM, 6 KB EEPROM, 51 I/O, 64-LQFP, -40°C to 85°C.

$7.0900Ref. price · indicative, final on quote
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Jul 2026

Specifications

STM32L073RZT6U specifications
ParameterValue
SeriesSTM32L0
MountingSurface Mount
Oscillator typeInternal
Program memory typeFLASH
Voltage - supply (Vcc (Vdd))1.8V ~ 3.6V
Operating temperature-40°C~85°C(TA)
Speed32MHz
PackageTray
RAM size20K x 8
Core size32-Bit Single-Core
EEPROM size6K x 8
PeripheralsBrown-out Detect/Reset, DMA, I²S, LCD, POR, PWM, WDT
ConnectivityI²C, IrDA, LINbus, SPI, UART/USART, USB
Number of i (O)51
Core processorARM® Cortex®-M0+
Case64-LQFP
Data convertersA/D 16x12b; D/A 2x12b
Program memory size192KB (192K x 8)

Product details

32 MHz Cortex-M0+ with integrated EEPROM — fit check for low-power control

64-LQFP — a layout-friendly footprint

No exposed pad to stitch, no BGA reflow complexity — standard rework techniques handle it. The 51 GPIOs leave enough headroom for a segment LCD, a keypad matrix, and a few serial interfaces without multiplexing.

Frequently asked questions

What is the closest pin-compatible alternative to STM32L073RZT6U?

Within the STM32L0 family, the STM32L073xZ variants (same 64-pin LQFP footprint) share the same pinout and peripheral set. The key differentiator is Flash and RAM density — the STM32L073RZT6U sits at the 192 KB Flash / 20 KB RAM tier. A lower-density sibling in the same package may be pin-compatible but check the memory map and available I/O for your firmware image.

What is the listed speed of STM32L073RZT6U?

The STM32L073RZT6U is rated for a 32 MHz core clock. This is the maximum CPU frequency; the actual throughput depends on Flash wait states and the clock tree configuration.