The 24-channel 12-bit ADC and four 12-bit DAC channels are integrated on-chip, so a motor-drive or digital-power BOM can drop the separate analog front-end ICs.
512 KB Flash and 112 KB SRAM — firmware and data budget
If your application uses the on-chip DACs for analog setpoints or waveform generation, the SRAM can hold lookup tables without stealing cycles from the core.
For dual-sourcing planning, note that the STM32G4 series shares a common pinout across density options — a move to a higher-Flash sibling within the family is a straight footprint swap, though the firmware image size will need updating.
64-LQFP package — footprint and routing
Housed in a 64-pin LQFP with a 10x10 mm body (0.5 mm pitch), the STM32G491RET6 routes comfortably on a two-layer board for moderate I/O counts. Surface-mount assembly is standard; no exposed pad means the thermal path is through the leads, so keep the ambient below 85°C or add airflow if the core runs sustained loads near the maximum current draw.