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STMicroelectronics STM32F429ZET6 — Microcontrollers & Processors (MCU / MPU / DSP)

STM32F429ZET6 — STM32F4 Cortex-M4 MCU 180MHz 512KB Flash 144-LQFP

MPNSTM32F429ZET6
End of Life

STMicroelectronics STM32F4 series, ARM Cortex-M4 single-core MCU running at 180MHz, 512KB Flash, 256KB RAM, 114 I/O, Ethernet and USB OTG, 24×12-bit ADC, 2×12-bit DAC, 144-LQFP tray package, -40°C to 85°C operating temperature.

$14.6600Ref. price · indicative, final on quote
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Specifications

STM32F429ZET6 Technical Specifications
ParameterValue
SeriesSTM32F4
Mounting typeSurface Mount
Oscillator typeInternal
Program memory typeFLASH
Voltage - supply (Vcc (Vdd))1.8V ~ 3.6V
Operating temperature-40°C ~ 85°C (TA)
Speed180MHz
PackageTray
RAM size256K x 8
Core size32-Bit Single-Core
PeripheralsBrown-out Detect/Reset, DMA, I²S, LCD, POR, PWM, WDT
ConnectivityCANbus, EBI/EMI, Ethernet, I²C, IrDA, LINbus, SPI, UART/USART, USB OTG
Number of i (O)114
Core processorARM® Cortex®-M4
Case144-LQFP
Data convertersA/D 24x12b; D/A 2x12b
Program memory size512KB (512K x 8)

Frequently asked questions

Can the STM32F429ZET6 run at full 180MHz clock in a 65°C panel ambient without active cooling?

The operating temperature rating is -40°C to 85°C ambient. At 65°C cabinet ambient the part is within its absolute rating, but whether derating is required depends on the board's junction-to-ambient thermal resistance — not a datasheet parameter. If thermal margin is uncharacterized, reducing the core clock is the conservative path. The supply range of 1.8V to 3.6V also requires a regulated 3.3V rail; a 5V rail without regulation is not within spec.

We need 18 simultaneous ADC channels at 12-bit resolution. Can the STM32F429ZET6's 24-channel ADC support this via DMA?

The part lists 24×12-bit A/D converters. The STM32F4 ADC supports sequential sampling across multiple channels triggered by DMA, which is the standard method for multi-channel acquisition in industrial data acquisition firmware. Concurrent sampling — all channels simultaneously — is not a supported mode on this ADC architecture; the hardware sequencer samples channel-by-channel at the configured conversion rate. The DAC channels (2×12-bit,) operate on a separate bus and do not consume ADC bandwidth.