72 MHz Cortex-M4 with FPU — what it buys you
The Cortex-M4 core includes a single-precision floating-point unit (FPU) and DSP instructions, so control loops that would otherwise eat soft-FPU cycles on a Cortex-M3 run in hardware here — think motor-current PID, sensor fusion, or digital-filter stages in a mixed-signal environment.
Memory sizing for the BOM tier
The 16 KB SRAM, organised as 16K x 8, handles a couple of moderate DMA buffers alongside the stack and heap. If your firmware footprint is already pushing 28 KB, look at the 64 KB Flash variants in the same 48-LQFP footprint.
The 37 I/O lines in the 48-LQFP package give reasonable headroom for a mixed analog/digital design; eight 12-bit ADC channels and one 12-bit DAC are integrated for direct sensor or actuator interfacing.