The 64-LQFP package gives you 51 I/O, plus a 16-channel 12-bit ADC and a 2-channel 12-bit DAC. This is the part you spec when a design needs both real-time control and wired networking without adding an external PHY controller — the Ethernet MAC talks directly to the core.
Ethernet, CAN, USB OTG — the connectivity that sets it apart
What distinguishes the STM32F107 from the rest of the STM32F1 family is the on-chip Ethernet MAC. It supports MII and RMII interfaces to an external PHY, so you can add 10/100 Ethernet with just a transceiver and magnetics. The two CAN controllers handle industrial fieldbus gateways, and USB OTG lets the MCU act as either host or device — useful for firmware updates over a USB stick or connecting to a sensor hub. The 72 MHz core has enough headroom to run the Ethernet stack, a real-time OS, and application code without bottlenecking, as long as the DMA engine is used for packet buffers.
256 KB Flash, 64 KB SRAM — sizing the firmware and data buffers
The 64 KB SRAM handles packet buffers for Ethernet (typically 16–32 KB for the stack) plus the RTOS and data arrays. If your design streams audio or logs high-rate sensor data, watch the SRAM budget — the 64 KB is adequate for most industrial gateways but tight for video or large circular buffers. The DMA controller offloads peripheral transfers, so the core isn't stalled by memory copies.
If you are already using it in a BOM, the supply channel is stable through authorized and independent distribution. The ROHS3 compliance covers current environmental regulations.
64-LQFP package — layout and rework notes
The 64-LQFP package has a 0.5 mm pitch, which is manageable with standard soldering processes. No exposed pad — all thermal dissipation goes through the leads, so keep the copper pour on the VDD pins generous if the MCU drives multiple peripherals at full speed. The surface-mount footprint is industry-standard; rework with hot air at 260°C peak per J-STD-020.