72 MHz Cortex-M3 with 512 KB Flash — the high-density tier
It is the high-density variant in the F103 line, designed for applications that need the full 512 KB code space and the 112 I/O count that the 144-ball BGA package enables. The core is a single Cortex-M3 with a 3-stage pipeline and hardware multiply/divide, clocked from an internal oscillator or an external crystal. For a BOM that needs the 144-ball BGA footprint and the 512 KB / 64 KB memory split, this is the production-grade MCU to specify.
On-chip peripherals include DMA, motor-control PWM, PDR (power-down reset), POR (power-on reset), PVD (programmable voltage detector), a temperature sensor, and a watchdog timer. The data converters give you 21 analog inputs at 12-bit resolution and two 12-bit DAC outputs.
144-LFBGA (10x10) — what the package means for the board
The 144-LFBGA package measures 10x10 mm with a 0.8 mm ball pitch. That is a fine-pitch BGA — the board needs a solder mask defined pad, a via-in-pad or microvia strategy for the inner rows, and X-ray inspection after reflow. The supplier device package code is 144-LFBGA (10x10). Surface-mount only, no through-hole equivalent. For rework, a hot-air station with a BGA nozzle and a preheater is mandatory — do not attempt with a soldering iron. The 112 I/O count means roughly 28 unused balls in a typical design, which can be left floating or tied to ground per ST's recommendation.
No lead-time or stock figures are held on this page; the quote will reflect real-time supply.