768 KB Flash, 72 MHz Cortex-M3 — the high-density STM32F103 variant
The STM32F103RFT6TR is the high-density member of the STM32F103 line, offering 768 KB Flash and 96 KB SRAM in the 64-LQFP package. It integrates motor control PWM timers, DMA, a 12-bit ADC with 16 channels, a 12-bit DAC with 2 channels, and connectivity for CANbus, USB, I²C, SPI, and multiple UART/USART interfaces.
72 MHz core and 96 KB SRAM — headroom for real-time control loops
The 72 MHz Cortex-M3 core delivers 1.25 DMIPS/MHz, enough for sensor fusion or field-oriented motor control loops without external DSP. The 96 KB SRAM supports dual CAN message buffers, a USB packet buffer, and a modest RTOS heap simultaneously.
Motor control PWM and CAN — built for drive and industrial bus nodes
The peripheral set includes advanced motor control PWM timers with dead-time insertion and complementary outputs, plus a CAN 2.0B interface. This combination makes the STM32F103RFT6TR a direct fit for brushless DC (BLDC) and permanent-magnet synchronous motor (PMSM) drives, as well as CANopen fieldbus nodes.
The base product number is STM32F103, which shares pin-compatibility across the STM32F103 value-line density options — a 256 KB or 512 KB Flash sibling can serve as a drop-in substitute if the full 768 KB is not needed, though the firmware image must fit the smaller memory.
Sourcing note: TR suffix is Tape & Reel, same die as the tray variant
The die and firmware are identical to the tray-packaged STM32F103RFT6. If your BOM specifies the tray variant, this TR version is a direct substitute — same footprint, same electricals, same programming algorithm.