The STM32F091CCT6TR: ROHS3 compliant per the listing, so it passes the EU material restriction check without an exemption.
The ARM Cortex-M0 core runs at 48 MHz, which is the ceiling for this part. The 32-bit single-core architecture handles 8- and 16-bit data efficiently, so migrating from an older 8-bit design is straightforward. The 32 KB SRAM leaves room for a couple of moderate-size buffers — enough for a 128-byte CAN message queue or a 1 KB ADC sample buffer — without forcing external RAM.
Integrated analog and connectivity
Thirteen 12-bit ADC channels and two 12-bit DAC channels are on-chip, reducing the need for external analog front-end components in sensor and control-loop designs.
