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STMicroelectronics STM32F070C6T6 — Microcontrollers & Processors (MCU / MPU / DSP)

STM32F070C6T6 ARM Cortex-M0 MCU, 48 MHz, 32 KB Flash

MPNSTM32F070C6T6
Active

STMicroelectronics STM32F0 series, ARM Cortex-M0, 32-bit, 48 MHz, 32 KB Flash, 6K x 8 RAM, 37 I/O, I²C/SPI/UART/USB, A/D 12x12b, -40°C to 85°C, 48-LQFP (7x7 mm), Tray.

$2.8000Ref. price · indicative, final on quote
Packaging48-LQFP
RoHSROHS3 Compliant
SeriesSTM32F0
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

STM32F070C6T6 specifications
ParameterValue
SeriesSTM32F0
MountingSurface Mount
Oscillator typeInternal
Program memory typeFLASH
Voltage - supply (Vcc (Vdd))2.4V ~ 3.6V
Operating temperature-40°C ~ 85°C (TA)
Speed48MHz
PackageTray
RAM size6K x 8
Core size32-Bit Single-Core
PeripheralsDMA, POR, PWM, WDT
ConnectivityI²C, SPI, UART/USART, USB
Number of i (O)37
Core processorARM® Cortex®-M0
Case48-LQFP
Data convertersA/D 12x12b
Program memory size32KB (32K x 8)

Product details

48 MHz Cortex-M0 with USB — the entry-level workhorse

The STM32F070C6T6: The 48 MHz ARM Cortex-M0 core runs the 12-bit ADC with 12 channels for analog inputs.

The 32 KB Flash (32K x 8) and 6 KB SRAM handle the program store and data buffers.

37 I/O and USB in a 48-LQFP — layout notes

The 48-LQFP (7x7 mm) gives 37 usable I/O lines.

Industrial temperature, active lifecycle — no obsolescence worry

ROHS3 compliant.

Frequently asked questions

How much Flash and RAM does the STM32F070C6T6 have?

That is the entry-level density in the STM32F070 line — enough for USB HID/CDC, sensor fusion, or motor control with moderate data logging.

What is the closest functional alternative — STM32L151CBU6A?

The STM32L151CBU6A is a Cortex-M3 part at 32 MHz with lower power but no USB, in a different package (UFBGA). It is not a pin-compatible drop-in. For a USB-capable second source within the STM32F0 family, look at the STM32F072 series (48 MHz, 128 KB Flash, USB) — same 48-LQFP footprint, but check the peripheral set differences.