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STMicroelectronics STM1061N29WX6F — Power Management (PMIC / Gate Driver)

STM1061N29WX6F STMicroelectronics Simple Reset/Power-On

MPNSTM1061N29WX6F
End of Life

STMicroelectronics STM1061N29WX6F, Simple Reset/Power-On Reset, Active Low, Open Drain or Open Collector, 1 channel, 2.9V threshold, 30µs typical propagation delay, -40°C to 85°C, SOT-23-3.

$0.98Ref. price · indicative, final on quote
PackagingTO-236-3, SC-59, SOT-23-3
RoHSROHS3 Compliant
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

STM1061N29WX6F specifications
ParameterValue
TypeSimple Reset/Power-On Reset
MountingSurface Mount
Voltage - threshold2.9V
Number of voltages monitored1
Operating temperature-40°C ~ 85°C (TA)
ResetActive Low
OutputOpen Drain or Open Collector
PackageTape & Reel (TR); Cut Tape (CT)
Reset timeout30µs Typical Propagation Delay
CaseTO-236-3, SC-59, SOT-23-3

Product details

Open-drain output and active-low reset

This lets you connect multiple open-drain reset outputs to the same node — common in multi-rail systems where any one fault should trigger a system reset. The active-low polarity matches the reset input of most MCUs, DSPs, and FPGAs. No level shifting needed if the pull-up voltage matches the logic supply.

The SOT-23-3 package (also known as TO-236-3 or SC-59) is a three-pin surface-mount package. The pinout is standard for this class of supervisor: ground, reset output, and supply input. The small footprint saves board space and fits into dense layouts. Tape & Reel and Cut Tape options are available for both prototyping and production reels.

Frequently asked questions

Does STM1061N29WX6F support open-drain output and active-low reset?

Yes, the output is open drain or open collector, and the reset is active low. This is the standard interface for wire-OR reset schemes.

What is the typical propagation delay of STM1061N29WX6F?

The typical propagation delay is 30µs, fast enough to catch supply glitches before the downstream logic enters an undefined state.