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STMicroelectronics LD39030SJ25R — Power Management (PMIC / Gate Driver)

STMicroelectronics LD39030SJ25R LDO, 300mA, 2.5V Fixed

MPNLD39030SJ25R
End of Life

STMicroelectronics LD39030SJ25R LDO linear voltage regulator, fixed 2.5 V output, 300 mA, 4-UFBGA/FCBGA flip-chip, -40°C to 125°C, ROHS3.

$0.82Ref. price · indicative, final on quote
Packaging4-UFBGA, FCBGA
RoHSROHS3 Compliant
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

LD39030SJ25R specifications
ParameterValue
Output typeFixed
MountingSurface Mount
Voltage - input5.5V
Voltage dropout0.3V @ 300mA
Voltage - output (Min (Fixed))2.5V
Output current300mA
Current - supply85 µA
Current - quiescent50 µA
Operating temperature-40°C ~ 125°C
PSRR62dB (1kHz ~ 10kHz)
PackageTape & Reel (TR); Cut Tape (CT)
Case4-UFBGA, FCBGA
Control featuresEnable
Protection featuresOver Current, Over Temperature, Soft Start
Number of regulators1
Output configurationPositive

Product details

300 mA fixed 2.5 V LDO — PSRR and dropout for noise-sensitive rails

The LD39030SJ25R is a single-output linear regulator delivering 300 mA at a fixed 2.5 V from a maximum input of 5.5 V. PSRR is 62 dB from 1 kHz to 10 kHz — this flat band covers the switching frequencies of most upstream buck converters and charge pumps. For an analog supply rail feeding a 16-bit ADC or a precision op-amp, that rejection keeps ripple below the noise floor without an additional LC filter stage. Quiescent current is 50 µA typ, rising to 85 µA max. For always-on rails in battery-backed systems — RTC supplies, SRAM keep-alive, or sensor bias — that overhead is low enough to ignore in the sleep budget.

4-ball flip-chip — 0.79 mm × 0.79 mm footprint

The LD39030SJ25R comes in a 4-UFBGA/FCBGA package (4-Flipchip, 0.79×0.79 mm). The supplier device package is 4-Flipchip with a 0.79×0.79 mm body — the same as the package/case designation. This is a wafer-level chip-scale package (WLCSP); the solder balls are directly on the die pads, so the board footprint is essentially the die size plus the ball pitch. Surface-mount assembly with standard lead-free reflow profiles applies. No underfill is required for typical handheld or IoT use, but if the board sees repetitive thermal cycling or mechanical shock (portable instruments, automotive modules), a capillary underfill under the 0.79 mm body improves solder-joint life.

Active production — no LTB window open

Protection features include over-current, over-temperature, and soft-start, so the part handles start-up into a discharged output capacitor without current spikes.

Frequently asked questions

What is the PSRR of the LD39030SJ25R?

The LD39030SJ25R provides 62 dB of power-supply rejection across the 1 kHz to 10 kHz band. This flat rejection profile covers the switching frequencies of typical upstream DC-DC converters, making it suitable for noise-sensitive analog supply rails.

What package does the LD39030SJ25R come in?

The LD39030SJ25R is supplied in a 4-UFBGA/FCBGA flip-chip package with a 0.79×0.79 mm body. It is a wafer-level chip-scale package (WLCSP) — the solder balls are directly on the die pads.