Skip to main content
NXP Semiconductors LS1021AXN7MQB — Discrete Semiconductors

NXP LS1021AXN7MQB QorIQ Layerscape MPU

MPNLS1021AXN7MQB
End of Life

NXP QorIQ® Layerscape LS1021AXN7MQB, dual-core ARM® Cortex®-A7 MPU, 1.2 GHz, USB 3.0 + PHY, SATA 6Gbps, 3x GbE, DDR3L/DDR4, -40°C to 105°C, 525-FCPBGA.

$67.41Ref. price · indicative, final on quote
Packaging525-FBGA, FCBGA
StockContact for availability
MOQ1 pcs
  • 100% new & originalTraceable channels only — no refurbs, no pulls, no remarked parts.
  • Date & lot codes on quoteStated per line before you commit; label photos on request.
  • MSL-compliant ESD packingMoisture-sealed bags with indicator cards; reels photo-verified.
  • PayPal buyer protectionPay by T/T, PayPal or Payoneer — card payments covered end to end.

Specifications

LS1021AXN7MQB Technical Specifications
ParameterValue
SeriesQorIQ® Layerscape
Mounting typeSurface Mount
Display & interface controllers2D-ACE
Operating temperature-40°C ~ 105°C
Number of cores (Bus width)2 Core, 32-Bit
USBUSB 3.0 (1) + PHY
SATASATA 6Gbps (1)
Speed1.2GHz
PackageTray
EthernetGbE (3)
Core processorARM® Cortex®-A7
Case525-FBGA, FCBGA
RAM controllersDDR3L, DDR4
Security featuresSecure Boot, TrustZone®

Product details

Two cores at 1.2 GHz for the control plane

The NXP LS1021AXN7MQB is a QorIQ Layerscale dual-core ARM Cortex-A7 processor running at 1.2 GHz. It targets the control-plane role in industrial switches, programmable logic controllers, and network-attached gateways. On the I/O side you get one USB 3.0 port with integrated PHY, one SATA 6 Gbps channel, and three Gigabit Ethernet MACs. That combination lets a single board serve as a storage appliance, a multi-port router, or a fieldbus head-end without external USB or SATA transceivers. The DDR3L/DDR4 memory controller gives the BOM flexibility to use whichever DRAM generation is cheaper at build time.

Temperature grade and enclosure fit

Rated for -40°C to 105°C, this part belongs in outdoor telecom cabinets, factory-floor controllers, and engine-bay-adjacent electronics where a fan is not guaranteed. The 525-FCPBGA (19x19 mm) footprint is a standard BGA for this performance tier; plan for a multi-layer PCB with at least four signal layers to route the DDR and GbE traces cleanly.

Active lifecycle — no LTB pressure

NXP lists the LS1021AXN7MQB as Active and ROHS3 compliant. There is no last-time-buy notice or NRND flag on this order code.

Frequently asked questions

What is the difference between LS1021AXN7MQB and LS1021AXN7MQA?

Both are pin-compatible dual-core Cortex-A7 parts in the same 525-FCPBGA package. The -MQB suffix typically indicates a higher speed grade or feature update; the exact delta is in the NXP datasheet revision history. For a board swap, the footprint and DDR3L/DDR4 interface are identical.

What are the specifications of LS1021AXN7MQB?

Dual-core ARM Cortex-A7 at 1.2 GHz, USB 3.0 with PHY, SATA 6 Gbps, three GbE MACs, DDR3L/DDR4 controller, 2D-ACE display controller, Secure Boot and TrustZone, -40°C to 105°C, 525-FCPBGA.