74LV132DB,118 — Quad NAND with Schmitt-Trigger Inputs
Quad 2-input NAND gate in the 74LV low-voltage CMOS logic family with Schmitt-trigger inputs on each gate. Operates from 1V to 5.5V supply rail. Each gate sources or sinks 12mA. Specified over -40°C to 125°C.
Speed and drive — 9ns propagation delay
Maximum propagation delay of 9ns at 5V driving a 50pF load. The 12mA symmetrical output drive (both source and sink) can directly drive a standard logic input, a small LED through a series resistor, or a short unterminated trace.
Lifecycle and sourcing
Active product status from NXP with ROHS3 compliance.
