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NXP Semiconductors 74HCT109D,652 — Analog & Data Acquisition
NXP Semiconductors

Nexperia 74HCT109D,652 Dual JK Flip-Flop, 55 MHz, SOIC-16

MPN74HCT109D,652
End of Life

Nexperia 74HCT109D,652 dual JK flip-flop, positive-edge triggered, 55 MHz clock frequency, 4.5 V to 5.5 V supply, complementary outputs, set and reset, -40 to 125 °C, 16-SOIC package.

$0.2Ref. price · indicative, final on quote
74HCT109D,652 datasheet
Packaging16-SOIC (0.154", 3.90mm Width)
StockContact for availability
MOQ1 pcs
  • 100% new & originalTraceable channels only — no refurbs, no pulls, no remarked parts.
  • Date & lot codes on quoteStated per line before you commit; label photos on request.
  • MSL-compliant ESD packingMoisture-sealed bags with indicator cards; reels photo-verified.
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Specifications

74HCT109D,652 Technical Specifications
ParameterValue
TypeJK Type
Series74HCT
Output typeComplementary
Trigger typePositive Edge
Mounting typeSurface Mount
Voltage4.5V ~ 5.5V
Current - quiescent4 µA
Current - output high, low4mA, 4mA
Frequency55 MHz
Operating temperature-40°C ~ 125°C (TA)
PackageBulk
FunctionSet(Preset) and Reset
Case16-SOIC (0.154\", 3.90mm Width)
Input capacitance3.5 pF
Number of elements2
Number of bits per element1
Max propagation delay @ v, max CL35ns @ 6V, 50pF

Product details

55 MHz clock and 35 ns propagation delay

The 55 MHz maximum clock frequency sets the upper counting or data-shifting rate for a synchronous design. The 35 ns max propagation delay (measured at 6 V supply and 50 pF load) means this part fits moderate-speed control and interface logic.

Package and footprint

Supplied in a 16-pin SOIC package with 3.90 mm body width (supplier device package 16-SO). Surface-mount assembly compatible with standard reflow profiles.

Sourcing and lifecycle

Nexperia continues to manufacture this part, so there is no last-time-buy pressure. It is available through independent distribution and can be sourced to order against an RFQ.

Frequently asked questions

How does 74HCT109D compare to 74HC109?

The 74HCT109 uses TTL-compatible input thresholds (VIL max 0.8 V, VIH min 2.0 V), while the 74HC109 uses CMOS thresholds (0.3×VCC and 0.7×VCC). At 5 V supply, the HCT variant can be driven directly by 5 V TTL logic or by 3.3 V logic with adequate margin, whereas the HC variant requires a full CMOS-level drive. Both are pin-compatible and have the same 55 MHz clock speed and 35 ns propagation delay at 6 V. Choose HCT when mixing logic families; choose HC for pure CMOS systems.

Is 74HCT109D a TTL or CMOS flip-flop?

It is a CMOS flip-flop (74HCT family) with TTL-compatible input thresholds. The output drive is CMOS-level (rail-to-rail) but the inputs are designed to recognise TTL logic levels, making it a drop-in for 5 V TTL systems.

What is the recommended replacement for 74HCT109D if obsolete?

No replacement is needed — the part is active. If a second source is required, any 74HCT109 in a 16-SOIC package from another manufacturer (e.g., TI, ON Semiconductor) is pin-compatible and functionally identical.