Dual-supply level translation, 4-bit, 3-state
The NXP 74AVC4T245D,118 is a 4-bit dual-supply translation transceiver from the 74AVC series, with 3-state outputs. It handles bidirectional voltage level shifting between two independent supply rails, each ranging from 0.8 V to 3.6 V. Two elements, each 2 bits wide, give the designer flexibility to route separate data paths or gang them for a single 4-bit bus. The part operates across -40°C to +125°C, covering industrial and automotive ambient requirements.
Supply range and output drive for mixed-voltage buses
Each supply pin (VCCA, VCCB) accepts 0.8 V to 3.6 V independently — this covers 1.2 V, 1.8 V, 2.5 V, and 3.3 V logic families without external level-setting resistors. The translation direction is controlled by the DIR pin per element. Output drive is symmetric at 12 mA source and 12 mA sink per channel. At 3.3 V operation, this drives standard CMOS inputs and most LVTTL loads directly; at 1.2 V, the lower drive still meets the VIH/VIL thresholds of the receiving side. Housed in a 16-SOIC (0.154", 3.90 mm width) with supplier package designation 16-SO. The 1.27 mm pitch is a standard footprint for prototype builds and production runs alike, and the SOIC body is compatible with most pick-and-place and reflow profiles.
Active lifecycle and compliance status
The 74AVC4T245D,118 is listed as Active in NXP's current product portfolio. Part of the 74AVC series, a low-voltage CMOS logic family optimized for mixed-voltage systems. No official successor or second-source cross-reference is published for this order code.
