Dual buffer for mixed-voltage and low-power buses
The Nexperia 74AUP2G241GF,115 is a dual non-inverting buffer with 3-state outputs from the 74AUP family, designed to bridge voltage domains and drive lightly loaded buses in power-sensitive designs. Each of the two buffers handles one bit and can source or sink 4mA per channel, enough for CMOS logic inputs and short PCB traces.
The 0.8V minimum supply is the standout feature here. Most standard logic buffers cut out around 1.65V or 1.2V, so this part lets you buffer signals directly from a sub-1V rail without a separate level translator. At the top end, 3.6V covers the full 3.3V supply with margin, and the 4mA output drive is consistent across the range. For a design that already runs on a 1.8V or 2.5V rail, this buffer eliminates the need for a second regulator just for the logic interface.
Temperature range and where this part lives on the board
The 8-XFDFN package (1.35mm x 1mm) is a tiny leadless plastic package, so it saves board area but needs a careful reflow profile and a clean solder paste stencil.
Lifecycle and sourcing posture
It is listed as ROHS3 compliant.