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NXP Semiconductors 74AHC374D,112 — Discrete Semiconductors

NXP 74AHC374D,112 D-Type Flip-Flop, 120 MHz, 20-SOIC

MPN74AHC374D,112
End of Life

NXP Semiconductors 74AHC series D-Type flip-flop, 74AHC374D,112, octal 8-bit, positive edge triggered, tri-state non-inverted outputs, 120 MHz clock, 20-SOIC wide package, tube.

$0.19Ref. price · indicative, final on quote
Packaging20-SOIC (0.295", 7.50mm Width)
StockIn Stock (30)
Lead timeIn Stock wk
MOQ1 pcs
  • 100% new & originalTraceable channels only — no refurbs, no pulls, no remarked parts.
  • Date & lot codes on quoteStated per line before you commit; label photos on request.
  • MSL-compliant ESD packingMoisture-sealed bags with indicator cards; reels photo-verified.
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Specifications

74AHC374D,112 Technical Specifications
ParameterValue
TypeD-Type
Series74AHC
Output typeTri-State, Non-Inverted
Trigger typePositive Edge
Mounting typeSurface Mount
Voltage2V ~ 5.5V
Current - quiescent4 µA
Current - output high, low8mA, 8mA
Frequency120 MHz
Operating temperature-40°C ~ 125°C (TA)
PackageTube
FunctionStandard
Case20-SOIC (0.295\", 7.50mm Width)
Input capacitance3 pF
Number of elements1
Number of bits per element8
Max propagation delay @ v, max CL10.1ns @ 5V, 50pF

Product details

120 MHz octal D with wide supply margin

The 74AHC374D,112 is an octal D-type flip-flop from NXP's 74AHC series — eight positive-edge-triggered registers with tri-state, non-inverted outputs in a single 20-SOIC package. Clocked at 120 MHz, it captures data on the rising edge and holds it until the next clock or until the output-enable goes high to float the bus. Supply voltage spans 2 V to 5.5 V, so it runs on a 3.3 V or 5 V rail without a level translator on the supply side — common in mixed-voltage panels where the backplane is 5 V but the core logic is 3.3 V. Operating temperature covers -40°C to +125°C, which is the full industrial-automation range; it lives in an unheated cabinet or near a motor drive without derating.

Timing and drive at the bench level

Max propagation delay is 10.1 ns at 5 V with a 50 pF load — that is the time from clock edge to output valid. For a 120 MHz clock (8.33 ns period), the 10.1 ns delay means the output settles after the next clock edge unless the data path is pipelined; this part is better suited for bus-interface or register-file duty at lower clock rates or with registered inputs. Each output sources or sinks 8 mA — enough to drive a standard TTL load or a handful of CMOS inputs on a short trace, but not a long backplane or a 50-ohm terminated line without a buffer. Quiescent current sits at 4 µA typical, so the part's own draw is negligible in a battery-backed or always-on section of the board. Input capacitance is 3 pF per pin — light enough that the upstream driver sees a small load, which matters when the clock line fans out to multiple flip-flops.

20-SOIC wide — field-swap friendly

Housed in a 20-SOIC wide-body (7.50 mm body width, 0.295-inch pitch), the part is hand-solderable with a standard iron and a fine tip — no hot-air station required for a field repair. The wide pitch also means less risk of bridging during a quick swap on site. The supplier device package is 20-SO, which is the same footprint as the standard SOIC-20 wide — confirm the board land pattern matches the 7.50 mm body width, not the narrow 3.90 mm version.

Active production, sourced to order

ROHS3 compliant per the manufacturer — no restricted substances above the threshold; the part ships in a tube, not tape-and-reel, so it arrives loose for manual placement or small-batch assembly.

Frequently asked questions

What compliance documentation does NXP provide for the 74AHC374D,112?

NXP certifies the 74AHC374D,112 as ROHS3 compliant. The manufacturer's standard compliance documentation includes the RoHS declaration and material composition data — available through the product page or upon request. No UL, IEC, or AEC-Q qualification is listed for this standard-logic part.