NXP i.MX RT1166 dual-core crossover MCU, ARM Cortex-M7 at 500MHz plus Cortex-M4 at 240MHz, 1M×8 SRAM, external program memory, 2×12-bit ADC and 1×12-bit DAC, CANbus, Ethernet, USB OTG, 2.4V–3.6V, -40°C to 125°C TJ, 289-LFBGA (14×14mm) surface mount, ROHS3 Active.
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- MSL-compliant ESD packingMoisture-sealed bags with indicator cards; reels photo-verified.
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Specifications
| Parameter | Value |
|---|---|
| Series | i.MX |
| Mounting type | Surface Mount |
| Oscillator type | Internal |
| Program memory type | External Program Memory |
| Voltage - supply (Vcc (Vdd)) | 2.4V ~ 3.6V |
| Operating temperature | -40°C ~ 125°C (TJ) |
| Speed | 240MHz, 500MHz |
| Package | Tray |
| RAM size | 1M x 8 |
| Core size | 32-Bit Dual-Core |
| Peripherals | Brown-out Detect/Reset, DMA, POR, PWM, WDT |
| Connectivity | CANbus, EBI/EMI, Ethernet, I²C, MMC/SD/SDIO, SAI, SPDIF, SPI, UART/USART, USB OTG |
| Core processor | ARM® Cortex®-M4/M7 |
| Case | 289-LFBGA |
| Data converters | A/D 2x12b; D/A 1x12b |
Frequently asked questions
What is the supply voltage range and does the POR hold the cores in reset on cold start?
The MIMXRT1166XVM5A operates from 2.4V to 3.6V. The integrated POR circuit holds both the Cortex-M7 and the Cortex-M4 in reset until the supply clears the POR threshold; the exact threshold voltage is in the NXP datasheet.
Does the RT1166 integrate CAN FD and Ethernet natively, or are external transceivers required?
CAN FD and Ethernet are integrated MACs inside the chip — external physical-layer transceivers are still required to complete the bus. CAN FD needs a CAN FD transceiver pair; Ethernet needs an PHY.
What thermal headroom exists at 85°C ambient in a sealed panel?
TJ rating is 125°C, so at 85°C ambient the headroom is 40°C in the die — but the actual margin at the package level depends on board-level θJA and whether thermal vias connect the LFBGA ground pad to internal copper. The 14×14mm package does not include built-in heat spreading; thermal design is a board-level decision.