NXP LPC1756FBD80,551 — 32-bit Cortex-M3 MCU, 256KB Flash, USB OTG
MPNLPC1756FBD80,551
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NXP LPC1756FBD80,551, LPC17xx series, ARM Cortex-M3 32-bit single-core at 100MHz, 256KB Flash, 32KB RAM, 52 I/O, USB OTG / CAN / SPI / UART, 6×12-bit ADC + 1×10-bit DAC, 2.4–3.6V, -40°C to 85°C, 80-LQFP (12×12mm) tray.
$12.2100Ref. price · indicative, final on quote
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MOQ1 pcs
- 100% new & originalTraceable channels only — no refurbs, no pulls, no remarked parts.
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Specifications
| Parameter | Value |
|---|---|
| Series | LPC17xx |
| Mounting type | Surface Mount |
| Oscillator type | Internal |
| Program memory type | FLASH |
| Voltage - supply (Vcc (Vdd)) | 2.4V ~ 3.6V |
| Operating temperature | -40°C ~ 85°C (TA) |
| Speed | 100MHz |
| Package | Tray |
| RAM size | 32K x 8 |
| Core size | 32-Bit Single-Core |
| Peripherals | Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT |
| Connectivity | CANbus, I²C, IrDA, Microwire, SPI, SSI, SSP, UART/USART, USB OTG |
| Number of i (O) | 52 |
| Core processor | ARM® Cortex®-M3 |
| Case | 80-LQFP |
| Data converters | A/D 6x12b; D/A 1x10b |
| Program memory size | 256KB (256K x 8) |
Frequently asked questions
Does the ADC share a single VREF pin or route each channel to an individual reference?
All six ADC channels share a common VREF pin on the 80-LQFP package. VREF noise couples into every channel, so tight decoupling at the pin is required for full 12-bit performance under noisy conditions.
Is the USB OTG port on the LPC1756FBD80,551 true dual-role (host and device) or device-only?
USB OTG designates a true dual-role port — the LPC1756 supports both host and device modes. This affects panel-level UL/IEC 60950-1 certification scope when the USB port is accessible on the panel exterior; host mode enumeration adds to the touch-current and earth-leakage analysis.