
NXP LPC11A04UK,118 — 50MHz ARM Cortex-M0, 32KB Flash, 8KB RAM, 4KB EEPROM, 18 I/O, 2.6–3.6V supply, -40°C to 85°C, 20-WLCSP (2.55×2.55mm) package, Active.
- 100% new & originalTraceable channels only — no refurbs, no pulls, no remarked parts.
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Specifications
| Parameter | Value |
|---|---|
| Series | LPC11Axx |
| Mounting type | Surface Mount |
| Oscillator type | Internal |
| Program memory type | FLASH |
| Voltage - supply (Vcc (Vdd)) | 2.6V ~ 3.6V |
| Operating temperature | -40°C~85°C(TA) |
| Speed | 50MHz |
| Package | Tape & Reel (TR); Cut Tape (CT) |
| RAM size | 8K x 8 |
| Core size | 32-Bit Single-Core |
| EEPROM size | 4K x 8 |
| Peripherals | Brown-out Detect/Reset, POR, WDT |
| Connectivity | I²C, Microwire, SPI, SSI, SSP, UART/USART |
| Number of i (O) | 18 |
| Core processor | ARM® Cortex®-M0 |
| Case | 20-UFBGA, WLCSP |
| Data converters | A/D 8x10b; D/A 1x10b |
| Program memory size | 32KB (32K x 8) |
Frequently asked questions
Does the 20-WLCSP footprint of the LPC11A04UK match a 0.5mm-pitch QFN layout?
No. The LPC11A04UK uses a 20-ball 0.4mm-pitch WLCSP at 2.55×2.55mm. It is not pin-compatible with NXP LPC11U-family parts in QFN or TSSOP packages — the ball pitch and pad pattern are physically incompatible. A PCB routed for a larger-package variant requires a respin to accept this WLCSP part.
Does the LPC11A04UK support hot-swap replacement in the field, or does the SPI/SSP bus require a reset?
The device does not support bus-state preservation across an unpowered removal. Field replacement of a failed unit requires a power cycle to re-initialise the SPI/SSP and UART peripherals — hot-swap without reset is not a supported configuration on this LPC11Axx family variant.