
CY7C25422KV18-333BZXI 72Mbit QDR II+ SRAM, 333MHz, 1.7-1.9V, 165-FBGA
Infineon (Cypress) CY7C25422KV18-333BZXI, 72Mbit QDR II+ synchronous SRAM, 333MHz clock, 1.7-1.9V, 2M×36 parallel organization, -40 to 85°C, 165-FBGA tray package.
- 100% new & originalTraceable channels only — no refurbs, no pulls, no remarked parts.
- Date & lot codes on quoteStated per line before you commit; label photos on request.
- MSL-compliant ESD packingMoisture-sealed bags with indicator cards; reels photo-verified.
- PayPal buyer protectionPay by T/T, PayPal or Payoneer — card payments covered end to end.
Specifications
| Parameter | Value |
|---|---|
| Memory type | Volatile |
| Mounting type | Surface Mount |
| Voltage | 1.7V ~ 1.9V |
| Frequency | 333 MHz |
| Memory interface | Parallel |
| Operating temperature | -40°C ~ 85°C (TA) |
| Package | Tray |
| Technology | SRAM - Synchronous, QDR II+ |
| Memory size | 72Mbit |
| Memory format | SRAM |
| Case | 165-LBGA |
| Memory organization | 2M x 36 |
Frequently asked questions
Is there a pin-compatible replacement in the Cypress/Infineon family?
No. The three peer parts in the cross-reference ledger (CY7C25632KV18-400BZXI, CY7C2644KV18-300BZXI, and CY7C25652KV18-500BZC) each differ in memory organization, bus width, or temperature grade in ways that break drop-in compatibility. None is a direct substitute without board or firmware change.
What does the 1.7 to 1.9V supply window mean for a system with a noisy rail?
The part has no documented UVLO or data-retention spec below 1.7V. If the rail can dip during load transients, a local hold-up cap at the VCC balls is the standard mitigation to protect the 72Mbit of SRAM state.