CY7C1620KV18-300BZC 144Mbit DDR II SRAM, 300MHz, 1.7-1.9V, 165-FBGA
MPNCY7C1620KV18-300BZC
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Cypress (now Infineon) CY7C1620KV18-300BZC is a 144 Mbit synchronous DDR II SRAM organized as 4M by 36 bits, operating at 300 MHz with a 1.7–1.9 V supply in a 165-FBGA (15x17) surface-mount package rated 0°C to 70°C.
$215.4000Ref. price · indicative, final on quote
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Specifications
| Parameter | Value |
|---|---|
| Memory type | Volatile |
| Mounting type | Surface Mount |
| Voltage | 1.7V ~ 1.9V |
| Frequency | 300 MHz |
| Memory interface | Parallel |
| Operating temperature | 0°C~70°C(TA) |
| Package | Bulk |
| Technology | SRAM - Synchronous, DDR II |
| Memory size | 144Mbit |
| Memory format | SRAM |
| Case | 165-LBGA |
| Memory organization | 4M x 36 |
Frequently asked questions
Can I replace a CY7C1613KV18-333BZXC (8M x 18) with the CY7C1620KV18-300BZC (4M x 36)?
No — the memory organizations differ (8M x 18 vs 4M x 36), meaning address and bank-select pin mappings are not compatible. The same 165-FBGA footprint does not guarantee drop-in swap without board re-route and firmware memory-controller changes.
Does the CY7C1620's 1.7–1.9 V supply work with a legacy 3.3 V memory rail?
A dedicated 1.7–1.9 V LDO or POL regulator is required — 3.3 V level-translation on the DDR II bus introduces skew at 300 MHz that the timing budget may not absorb. Budget a clean, locally regulated 1.7 V rail with adequate PSRR for this device.