110 MHz zero-delay fanout — the BOM-fit read
The CY7B9911V-7JXCT is an Infineon RoboClock+™ zero-delay buffer that takes one LVTTL reference and distributes it to eight LVTTL outputs at up to 110 MHz. The internal PLL aligns the output edges to the input with near-zero propagation delay — the skew between any two outputs stays within the datasheet window, which is the parameter that matters for synchronous buses where setup-and-hold margins are tight.
Package and board-fit checklist
Housed in a 32-lead PLCC (J-lead) with a body size of 11.43 x 13.97 mm. The J-lead footprint is a through-hole-solder reflow hybrid — the leads bend under the package body, so the PCB land pattern uses a staggered pad array with a central thermal pad absent. The PLCC socket is an option for prototyping, but production boards typically reflow the J-leads directly onto the pads. The differential input/output flag is No/No — all I/O are single-ended LVTTL. No external loop filter components are needed for the PLL; the charge-pump and filter are integrated on die.
No pin-compatible second source or direct successor is listed on the manufacturer's cross-reference; the RoboClock+ family is the only parametric match.