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Infineon Technologies CY28381OC — Analog & Data Acquisition

Cypress CY28381OC Clock Synthesizer, PLL, 1:19 Output

MPNCY28381OC
End of Life

Cypress CY28381OC, Clock Synthesizer, PLL Yes, Input Clock/Crystal, Output Clock, 1:19 Ratio, 24MHz/48MHz Max, 3.135V-3.465V Supply, 0°C to 70°C, 48-BSSOP (7.50mm Width), Surface Mount.

$2.13Ref. price · indicative, final on quote
Packaging48-BSSOP (0.295", 7.50mm Width)
StockContact for availability
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Specifications

CY28381OC Technical Specifications
ParameterValue
TypeClock Synthesizer
Mounting typeSurface Mount
Voltage3.135V ~ 3.465V
Frequency24MHz, 48MHz
Operating temperature0°C ~ 70°C (TA)
PLLYes
InputClock, Crystal
OutputClock
PackageBulk
Case48-BSSOP (0.295\", 7.50mm Width)
Divider (Multiplier)Yes/No
Number of circuits1
Ratio - Input:Output1:19
Differential - Input:OutputNo/Yes

Product details

Processor-specific clock generator with 19 outputs

The Cypress CY28381OC is a PLL-based clock synthesizer designed to generate multiple synchronized clock signals from a single crystal or clock input. It accepts a clock or crystal input and delivers up to 19 clock outputs, making it suited for motherboard or embedded-system designs that need to distribute a clean reference to multiple peripherals, memory controllers, and I/O interfaces. The part operates from a 3.135V to 3.465V supply and is rated for the commercial temperature range of 0°C to 70°C, so it fits indoor, non-condensing equipment such as desktop PCs, industrial controllers, and telecom line cards that stay in a controlled environment.

What the 1:19 fanout and PLL mean for your clock tree

The 1:19 input-to-output ratio is the headline feature: a single reference drives 19 clock outputs, which saves board space and reduces component count compared to cascading multiple fanout buffers. The integrated PLL allows the synthesizer to generate frequencies that are multiples of the input, with the two maximum output frequencies listed at 24 MHz and 48 MHz. For a design that needs, say, a 24 MHz clock for a USB controller and a 48 MHz clock for an Ethernet MAC, this part can produce both from one crystal. The differential outputs (listed as No on the input side, Yes on the output side) mean the outputs are single-ended, not LVDS or LVPECL, so they connect directly to standard CMOS or TTL clock inputs without external termination resistors.

Package and footprint: 48-BSSOP (7.50 mm width)

The CY28381OC comes in a 48-lead BSSOP package with a 7.50 mm body width (the 0.295" variant). The supplier device package is listed as 48-SSOP. This is a surface-mount, fine-pitch package that requires a standard SSOP footprint. The 48-pin count is driven by the 19 clock outputs plus power, ground, and control pins. When laying out the board, keep the crystal input traces short and isolated from the output traces to avoid coupling noise back into the PLL.

Lifecycle and sourcing reality

The CY28381OC is listed as Active in production, so it is still being manufactured and there is no announced end-of-life. The RoHS status is marked as non-compliant, which means the part contains lead (Pb) in the solder finish or in the die attach. This is a flag for designs that must meet RoHS exemption limits or for markets that enforce full RoHS compliance. For lead-free assembly, a Pb-free variant or a different clock synthesizer would be needed.

Frequently asked questions

Is CY28381OC obsolete or still active?

The CY28381OC is listed as Active in production. There is no indication of obsolescence or a last-time-buy notice.

Is CY28381OC compatible with a 3.3V supply?

Yes, the supply voltage range is 3.135V to 3.465V, which covers a nominal 3.3V rail. The part is designed for 3.3V operation.