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Infineon Technologies CY28325OC-3 — Clock & Timing ICs

CY28325OC-3 Spread Spectrum Clock Generator, PLL, 48-SSOP

MPNCY28325OC-3
End of Life

Cypress Semiconductor CY28325OC-3 PLL-based Spread Spectrum Clock Generator, LVTTL/Crystal input, 1:19 clock outputs, 1 MHz max, dual 2.5V/3.3V supply, 48-BSSOP (7.50mm width), Commercial temp 0-70°C.

$5.7Ref. price · indicative, final on quote
Packaging48-BSSOP (0.295", 7.50mm Width)
RoHSRoHS non-compliant
Sourced new & surplus through independent channelsAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

CY28325OC-3 specifications
ParameterValue
TypeSpread Spectrum Clock Generator
MountingSurface Mount
Voltage2.375V ~ 2.625V, 3.135V ~ 3.465V
Frequency1MHz
Operating temperature0°C ~ 70°C (TA)
PLLYes
InputLVTTL, Crystal
OutputClock
PackageBulk
Case48-BSSOP (0.295\", 7.50mm Width)
Divider (Multiplier)Yes/No
Number of circuits1
Ratio - Input:Output1:19
Differential - Input:OutputNo/No

Product details

PLL-based spread-spectrum clock generator — 1:19 fanout, dual supply

The CY28325OC-3 is a PLL-based spread-spectrum clock generator. It accepts either an LVTTL reference or a crystal input and produces up to 19 clock outputs from that single source — a 1:19 input-to-output ratio. The spread-spectrum modulation spreads the output energy across a wider frequency band, reducing peak EMI radiated from the clock traces and cables in a system. The device operates from two independent supply rails: 2.375 V to 2.625 V and 3.135 V to 3.465 V. The maximum output frequency is 1 MHz, so this part is suited for distributing lower-speed clocks (system reference, audio frame sync, microcontroller clock trees) rather than high-speed SERDES or memory interfaces.

Package, temperature grade, and differential signaling

Housed in a 48-BSSOP (0.295", 7.50 mm width) surface-mount package, also listed as supplier device package 48-SSOP. The 0.65 mm pin pitch is standard for this body width — layout engineers should match the footprint to the SSOP-48 land pattern in their CAD library. Both the input and output paths are single-ended only — differential input is No and differential output is No. That means the clock distribution uses standard LVTTL traces with 50-ohm series termination at the source, not differential pairs with 100-ohm routing. The divider/multiplier function is present (Yes), but there is no internal multiplier (No) — the PLL multiplies the reference internally, but a separate multiplier block is not exposed. One circuit, one PLL core.

Active lifecycle, RoHS non-compliant — legacy BOM fit

However, it is marked RoHS non-compliant, meaning the termination finish contains lead (likely SnPb or similar). This part fits legacy BOMs that require tin-lead solder for rework or reliability reasons, or designs that are exempt from RoHS (military, aerospace, medical implant). New RoHS-compliant designs should check the CY28325OC-3's lead-free variant or a pin-compatible replacement.

Frequently asked questions

What supply voltages does CY28325OC-3 support?

The device operates from two separate supply rails: 2.375 V to 2.625 V and 3.135 V to 3.465 V.

Is CY28325OC-3 RoHS compliant?

No, the CY28325OC-3 is marked RoHS non-compliant. The termination finish contains lead. It is intended for legacy BOMs or applications with a RoHS exemption. For lead-free designs, verify whether a compliant variant (e.g., CY28325OC-3T) exists in the same family.