Active production — BOM-fit at 133 MHz
The CY2305SXI-1: It accepts a single clock input and distributes it to five outputs with matched phase, rated to 133.33 MHz maximum — the ceiling for the output clock frequency, not the input reference.
Package and board integration — 8-SOIC
The PLL is enabled internally (yes, per the spec), so no external loop-filter components are needed — the zero-delay lock is maintained by the on-chip phase detector and VCO.
ROHS3 Compliant — the part contains no restricted substances and carries no exemption expiry that would trigger a future compliance change. No stock-holding claim — the supply posture is quoted per BOM quantity.