Dual-port SRAM, 1 Mbit, 167 MHz — synchronous arbitration for shared memory
The Cypress CY7C0850AV-167BBC is a synchronous dual-port SRAM with 1 Mbit density organized as 32K x 36 bits. It clocks at 167 MHz and delivers a 4 ns access time, allowing two independent bus masters — DSPs, FPGAs, or ASICs — to read and write the same memory array without wait states or external arbitration logic. The 172-ball FBGA (15×15 mm) requires a controlled reflow profile.
