12-bit multiplying DAC with 380 ns settling
The PM7543FQ is a 12-bit buffered multiplying DAC built on an R-2R ladder architecture, delivering a 380 ns settling time to ±0.5 LSB for the full-scale step. That settling speed keeps the output valid within one serial clock cycle for most SPI-timed updates — the DAC is ready to convert again before the next word finishes shifting in. The serial data interface and external reference let you locate the DAC at the point of conversion, remote from the controller, without routing a parallel bus across the board. Differential output cancels common-mode noise on the analog lines — useful when the DAC feeds a long twisted-pair to a downstream amplifier or ADC driver.
Industrial temperature grade in a hermetic package
The 16-CERDIP (0.300″ wide) hermetic package keeps moisture and contaminants out — a consideration for sealed enclosures, condensation-prone environments, or any design where conformal coating alone is not enough.
Single 5 V supply, ±1 LSB linearity
A single 5 V rail powers both sides — no separate analog and digital regulators needed, but the 0.5 V analog tolerance means the 5 V rail must stay within ±5 % to keep the DAC in its specified accuracy band. INL and DNL are both ±1 LSB maximum. At 12 bits, ±1 LSB DNL guarantees monotonicity — the output never decreases for an increasing digital code, which matters when the DAC drives a closed-loop servo or a ramp generator where a non-monotonic step would cause a reversal.
RoHS non-compliant due to the hermetic CERDIP construction; designs requiring RoHS exemption documentation should plan for the lead-bearing package. Current pricing and lead time confirmed at quote time.