MX574AKEPI

End of Life In Stock · 24-48h Dispatch

Analog Devices · Discrete Semiconductors

Analog Devices MX574 12-bit SAR ADC, Single Ended input, 40k SPS, Parallel interface, 28-DIP (0.600", 15.24mm), Through Hole, Bulk.

Analog Devices MX574AKEPI — Discrete Semiconductors
RoHS Compliant · Lead-Free EIA-481 Standard Tape & Reel

Key Specifications

All 16 Specs
Package / Case
28-PDIP
Mounting Type
Through Hole
Operating Temp
-40°C ~ 85°C
Packaging Format
Bulk
Supply Voltage
-11.4V ~ -15.75V, 4.75V ~ 5.25V
Data Rate / Interface
Parallel
Input type
Single Ended
Reference type
Internal
In Stock: 827 pcs
MOQ: 1
Logistics: Shenzhen / HK Dispatch · DHL / FedEx DAP (3-7d) · Russia & CIS DDP
SWIFT T/T
$27.67 / pc (USD)
● Direct Purchase Ready
Volume Pricing Breaks per unit (USD)
1+ pcs
$27.67
10+ pcs
$24.90
30+ pcs
$22.69
100+ pcs
$20.48
500+ pcs
$19.09
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Full Technical Specifications

16 Parameters
MX574AKEPI specifications
Parameter / AttributeSpecification / Value
Input typeSingle Ended
MountingThrough Hole
Reference typeInternal
Voltage - supply, analog-11.4V ~ -15.75V, 4.75V ~ 5.25V
Voltage - supply, digital-11.4V ~ -15.75V, 4.75V ~ 5.25V
I/O channels1
Data interfaceParallel
Operating temperature-40°C ~ 85°C
PackageBulk
ArchitectureSAR
ConfigurationS/H-ADC
Number of bits12
Case28-DIP (0.600\", 15.24mm)
Ratio - s (H:ADC)1:1
Number of a (D converters)1
Sampling rate (Per second)40k
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Technical Details & Description

12-bit SAR ADC for legacy data-acquisition boards

The MX574AKEPI is a 12-bit successive-approximation-register (SAR) ADC from Analog Devices, sampling at 40k samples per second through a single-ended input. The 28-pin PDIP package (0.600-inch row spacing) and through-hole mounting mean this part fits socketed legacy designs or breadboard prototypes where a surface-mount ADC would require an adapter.

Sampling rate and interface — what the 40k SPS buys you

40k SPS is a moderate throughput — adequate for slow-moving signals like temperature, pressure, or strain-gauge outputs where the sensor bandwidth is under 2 kHz. The parallel data interface gives deterministic read timing without the latency of a serial bus, which matters when the host controller needs to capture the sample at a precise clock edge. The 1:1 S/H-to-ADC ratio means the internal sample-and-hold captures the input voltage once per conversion cycle; the acquisition time is already baked into the 40k SPS timing budget, so the external driver needs to settle within 25 µs to avoid missing the aperture. Single-ended input configuration keeps the pin count low — one analog channel per device — but the input range is referenced to the analog common, so the source must share the same ground reference without a differential rejection benefit.

MX574AKEPI
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