Supervisor with 4.65V threshold and 140ms reset timeout
The MAX818LESA: The reset output is open-drain, so it can be pulled up to a different logic voltage than the monitored rail — useful when the supervisor feeds a lower-voltage MCU or FPGA I/O bank. Reset timeout is 140ms minimum, giving the downstream processor enough time to stabilize after the supply crosses the threshold on power-up.
8-SOIC package and reflow considerations
Housed in an 8-SOIC package (0.154" body width, 3.90mm), the MAX818LESA uses a standard footprint that places cleanly with no tombstoning risk on a typical reflow profile.
Active lifecycle and RoHS status
RoHS non-compliant per the manufacturer's designation, so check your assembly's exemption allowance before committing to a BOM that requires full RoHS conformance.