Skip to main content
Analog Devices LM4050CEM3-2.1+T — Analog & Data Acquisition

LM4050CEM3-2.1+T Shunt Voltage Reference

MPNLM4050CEM3-2.1+T
End of Life

Maxim Integrated LM4050CEM3-2.1+T precision shunt voltage reference, fixed 2.048 V output, ±0.5% tolerance, 50 ppm/°C, SOT-23-3, -40°C to 125°C.

$2.7Ref. price · indicative, final on quote
PackagingTO-236-3, SC-59, SOT-23-3
RoHSROHS3 Compliant
Sourced new & surplus through independent channelsAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

LM4050CEM3-2.1+T specifications
ParameterValue
Output typeFixed
MountingSurface Mount
Reference typeShunt
Voltage - output (Min (Fixed))2.048V
Output current15 mA
Current - cathode65 µA
Operating temperature-40°C ~ 125°C (TA)
PackageTape & Reel (TR); Cut Tape (CT)
Tolerance±0.5%
CaseTO-236-3, SC-59, SOT-23-3
Noise - 10Hz to 10kHz28µVrms
Temperature coefficient50ppm/°C

Product details

Precision 2.048 V shunt reference in a SOT-23-3

The Maxim Integrated LM4050CEM3-2.1+T is a precision shunt voltage reference delivering a fixed 2.048 V output with a tight ±0.5% initial tolerance.

The shunt architecture draws a cathode current of 65 µA typical, and the part can source up to 15 mA to the load. That 65 µA quiescent is the minimum bias current needed to keep the reference in regulation — budget it in the supply rail alongside the load current. For battery-powered designs, the 65 µA floor is low enough to leave the reference on continuously without draining the cell overnight.

The SOT-23-3 package (TO-236 / SC-59 equivalent) is a three-pin body. It reflows cleanly with a standard hot-air profile — no hidden thermal pad, no risk of tombstoning if the paste stencil is right.

Frequently asked questions

Can LM4050CEM3-2.1+T be used as a replacement for LM4050CEM3-2.5?

The LM4050CEM3-2.5 outputs 2.5 V, while this part outputs 2.048 V. They are pin-compatible in the same SOT-23-3 package but the voltage difference means the circuit must be designed for the 2.048 V level — they are not drop-in replacements without adjusting the ADC reference or comparator threshold.